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1 features ? read access time ? 150 ns word-wide or byte-wide configurable dual voltage range operation ? unregulated battery power supply range, 2.7v to 3.6v or standard 5v 10% supply range 8-megabit flash and mask rom-compatible pinouts low-power cmos operation ?20 a maximum standby ? 10 ma max. active at 5 mhz for v cc = 3.6v jedec standard packages ? 44-lead plcc ? 44-lead soic (sop) ? 48-lead tsop (12 mm x 20 mm) high-reliability cmos technology ? 2,000 esd protection ? 200 ma latch-up immunity rapid ? programming algorithm ? 50 s/word (typical) cmos- and ttl-compatible inputs and outputs ? jedec standard for lvttl and lvbo integrated product identification code commercial and industrial temperature ranges description the AT27BV800 is a high-performance, low-power, low-voltage, 8,388,608-bit, one- time programmable read-only memory (otp eprom) organized as either 512k by 16 or 1024k by 8 bits. it requires only one supply in the range of 2.7 to 3.6v in normal rev. 0988d?05/00 8-megabit (512k x 16 or 1024k x 8) unregulated battery-voltage ? high-speed otp eprom AT27BV800 not recommended for new designs pin configurations pin name function a0 - a18 addresses o0 - o15 outputs o15/a-1 output/address byte /vpp byte mode/program supply ce chip enable oe output enable nc no connect tsop type 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 a15 a14 a13 a12 a11 a10 a9 a8 nc nc nc nc nc nc nc a18 a17 a7 a6 a5 a4 a3 a2 a1 a16 byte/vpp gnd o15/a-1 o7 o14 o6 o13 o5 o12 o4 vcc o11 o3 o10 o2 o9 o1 o8 o0 oe gnd ce a0 soic (sop) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 nc a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 ce gnd oe o0 o8 o1 o9 o2 o10 o3 o11 nc nc a8 a9 a10 a11 a12 a13 a14 a15 a16 byte/vpp gnd o15/a-1 o7 o14 o6 o13 o5 o12 o4 vcc (continued) plcc 7 8 9 10 11 12 13 14 15 16 17 39 38 37 36 35 34 33 32 31 30 29 a4 a3 a2 a1 a0 ce gnd oe o0 o8 o1 a12 a13 a14 a15 a16 byte/vpp gnd o15/a-1 o7 o14 o6 6 5 4 3 2 1 44 43 42 41 40 18 19 20 21 22 23 24 25 26 27 28 o9 o2 o10 o3 o11 nc vcc o4 o12 o5 o13 a5 a6 a7 a17 a18 gnd nc a8 a9 a10 a11 note: plcc package pin 23 is don ? t connect.
AT27BV800 2 read mode operation. the x16 organization makes this part ideal for portable and hand held 16- and 32-bit microprocessor-based systems using either regulated or unregulated battery power. atmel ? s innovative design techniques provide fast speeds that rival 5v parts while keeping the low power consump- tion of a 3v supply. at v cc = 2.7v, any word can be accessed in less than 150 ns. with a typical power dissipa- tion of only 10 mw at 5 mhz and v cc = 3v, the AT27BV800 consumes less than one fifth the power of a standard 5v eprom. standby mode supply current is typically less than 1 ma at 3v. the AT27BV800 simplifies system design and stretches battery lifetime even further by eliminating the need for power-supply regulation. the AT27BV800 can be organized as either word-wide or byte-wide. the organization is selected via the byte /v pp pin. when byte /v pp is asserted high (v ih ), the word-wide organization is selected and the o15/a-1 pin is used for o15 data output. when byte /v pp is asserted low (v il ), the byte-wide organization is selected and the o15/a-1 pin is used for the address pin a-1. when the AT27BV800 is log- ically regarded as x16 (word-wide), but read in the byte- wide mode, then with a-1 = v il , the lower eight bits of the 16 bit word are selected; with a-1 = v ih , the upper eight bits of the 16-bit word are selected. the AT27BV800 is available in industry-standard, jedec- approved, one-time programmable (otp) plcc, soic (sop) and tsop packages. the device features two-line control (ce ,oe ) to eliminate bus contention in high-speed systems. with high-density 512k-word or 1024k-bit storage capabil- ity, the AT27BV800 allows firmware to be to be stored reli- ably and to be accessed by the system without the delays of mass storage media. the AT27BV800 operating with v cc at 3.0v produces ttl- level outputs that are compatible with standard ttl logic devices operating at v cc = 5v. at v cc = 2.7v, the part is compatible with jedec-approved low-voltage battery oper- ation (lvbo) interface specifications. the device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts. atmel ? s AT27BV800 has additional features that ensure high quality and efficient production use. the rapid ? pro- gramming algorithm reduces the time required to program the part and guarantees reliable programming. program- ming time is typically only 50 s/word. the integrated prod- uct identification code electronically identifies the device and manufacturer. this feature is used by industry-stan- dard programming equipment to select the proper program- ming equipment and voltages. the AT27BV800 programs exactly the same way as a standard 5v at27c800 and uses the same programming equipment. system considerations switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. unless accommodated by the system design, these tran- sients may exceed datasheet limits, resulting in device non- conformance. at a minimum, a 0.1 f high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. this capacitor should be connected between the v cc and ground terminals of the device, as close to the device as possible. additionally, to stabilize the supply voltage level on printed circuit boards with large eprom arrays, a 4.7 f bulk electrolytic capacitor should be utilized, again connected between the v cc and ground terminals. this capacitor should be positioned as close as possible to the point where the power supply is connected to the array. block diagram
AT27BV800 3 note: 1. minimum voltage is -0.6v dc, which may undershoot to -2.0v for pulses of less than 20 ns. maximum output pin voltage is v cc + 0.75v dc, which may overshoot to + 7.0v for pulses of less than 20 ns. notes: 1. x can be v il or v ih. 2. read, output disable and standby modes require 2.7v v cc 3.6v or 4.5v v cc 5.5v. 3. refer to the programming characteristics tables in this datasheet. 4. v h = 12.0 0.5v. 5. two identifier words may be selected. all ai inputs are held low (v il ) except a9, which is set to v h , and a0, which is toggled low (v il ) to select the manufacturer ? s identification word and high (v ih ) to select the device code word. 6. standby v cc current (i sb ) is specified with v pp = v cc . v cc > v pp will cause a slight increase in i sb . absolute maximum ratings* temperature under bias ................................ -55 c to +125 c *notice: stresses beyond those listed under ? absolute maximum ratings ? may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. storage temperature ..................................... -65 c to +150 c voltage on any pin with with respect to ground ..................................-2.0v to +7.0v (1) voltage on a9 with respect to ground ......................................-2.0v to +14.0v (1) v pp supply voltage with respect to ground .......................................-2.0v to +14.0v (1) operating modes mode/pin ce oe ai byte /v pp outputs o 0 - o 7 o 8 - o 14 o 15 /a-1 read word-wide v il v il x (1) v ih d out d out d out read byte-wide upper v il v il x (1) v il d out high-z v ih read byte-wide lower v il v il x (1) v il d out high-z v il output disable x (1) v ih x (1) xhigh-z standby v ih x (1) x (1) x (6) high-z rapid program (3) v il v ih ai v pp d in pgm verify x v il ai v pp d out pgm inhibit v ih v ih x (1) v pp high-z product identification (5) v il v il a9 = v h (4) a0 = v ih or v il a1 - a18 = v il v ih identification code
AT27BV800 4 notes: 1. v cc must be applied simultaneously or before v pp , and removed simultaneously or after v pp . 2. v pp may be connected directly to v cc except during programming. the supply current would then be the sum of i cc and i pp . dc and ac operating conditions for read operation AT27BV800 -15 operating temperature (case) com. 0 c - 70 c ind. -40 c - 85 c v cc power supply 2.7v to 3.6v 5v 10% dc and operating characteristics for read operation symbol parameter condition min max units v cc = 2.7v to 3.6v i li input load current v in = 0v to v cc 1a i lo output leakage current v out = 0v to v cc 5a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 a i sb v cc (1) standby current i sb1 (cmos), ce = v cc = 0.3v 20 a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 100 ma i cc v cc active current f = 5 mhz, i out = 0 ma, ce = v il , v cc = 3.6v 10 ma v il input low voltage v cc = 3.0 to 3.6v -0.6 0.8 v v cc = 2.7 to 3.6v -0.6 0.2 x v cc v v ih input high voltage v cc = 3.0 to 3.6v 2.0 v cc + 0.5 v v cc = 2.7 to 3.6v 0.7 x v cc v cc + 0.5 v v ol output low voltage i ol = 2.0 ma 0.4 v i ol = 100 a 0.2 v i ol = 20 a 0.1 v v oh output high voltage i oh = -2.0 ma 2.4 v i oh = -100 a v cc - 0.2 v i oh = -20 a v cc - 0.1 v v cc = 4.5v to 5.5v i li input load current v in = 0v to v cc 1.0 a i lo output leakage current v out = 0v to v cc 5.0 a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 a i sb v cc (1) standby current i sb1 (cmos), ce = v cc = 0.3v 100 a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 1 ma i cc v cc active current f = 5mhz, i out = 0 ma, ce = v il 40 ma v il input low voltage -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.5 v v ol output low voltage i oh = -2.1 ma 0.4 v v oh output high voltage i oh = -400 a 2.4 v
AT27BV800 5 notes: 1. 2,3,4,5. see the ac waveforms for read operation diagram. byte-wide read mode ac waveforms (1) note: 1. byte /v pp = v il word-wide read mode ac waveforms (1) note: 1. byte /v pp = v ih ac characteristics for read operation v cc = 2.7v to 3.6v and 4.5v to 5.5v symbol parameter condition AT27BV800-15 units min max t acc (3) address to output delay ce = oe = v il 150 ns t ce (2) ce to output delay oe = v il 150 ns t oe (2,3) oe to output delay ce = v il 50 ns t df (4,5) oe or ce high to output float, whichever occurred first 40 ns t oh (4) output hold from address ce or oe , whichever occurred first 5.0 ns t st byte high to output valid 150 ns t std byte low to output transition 60 ns a18 a18
AT27BV800 6 output test load note: cl = 100 pf including jig capacitance. note: 1. typical values for nominal supply voltage. this parameter is only sampled and is not 100% tested. pin capacitance f = 1 mhz, t = 25 c (1) symbol typ max units conditions c in 410pfv in = 0v c out 812pfv out = 0v input test waveforms and measurement levels t r , t f < 20 ns (10% to 90%) byte transition ac waveforms notes: 1. timing measurement references are 0.8v and 2.0v. input ac drive levels are 0.45v and 2.4v, unless otherwise specified. 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce . 3. oe may be delayed up to t acc - t oe after the address is valid without impact on t acc . 4. this parameter is only sampled and is not 100% tested. 5. output float is defined as the point when data is no longer driven. a0 - a18 a-1 o-o 07 byte/v pp t acc t st t std t oh t oh o-o 815 hi-z valid valid data out data out data out
AT27BV800 7 programming waveforms (1) notes: 1. the input timing reference is 0.8v for v il and 2.0v for v ih . 2. t oe and t dfp are characteristics of the device but must be accommodated by the programmer. 3. when programming the AT27BV800, a 0.1 f capacitor is required across v pp and ground to suppress voltage transients. dc programming characteristics t a = 25 5 c, v cc = 6.5 0.25v, v pp = 13.0 0.25v symbol parameter test conditions limits units min max i li input load current v in = v il , v ih 10 a v il input low level -0.6 0.8 v v ih input high level 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 a 2.4 v i cc2 v cc supply current (program and verify) 50 ma i pp2 v pp supply current ce = v il 30 ma v id a9 product identification voltage 11.5 12.5 v
AT27BV800 8 notes: 1. v cc must be applied simultaneously or before v pp and removed simultaneously or after v pp . 2. this parameter is only sampled and is not 100% tested. output float is defined as the point where data is no longer driven ? see timing diagram. 3. program pulse width tolerance is 50 s 5%. atmel ? s 27bv800 integrated product identification code (1) note: 1. the AT27BV800 has the same product identification code as the at27c800. both are programming compatible. ac programming characteristics t a = 25 5 c, v cc = 6.5 0.25v, v pp = 13.0 0.25v symbol parameter test conditions (1) limits units min max t as address setup time input rise and fall times: (10% to 90%) 20 ns input pulse levels: 0.45v to 2.4v input pulse levels: 0.8v to 2.0v input timing reference level: 0.8v to 2.0v output timing reference level: 0.8v to 2.0v 2s t oes oe setup time 2 s t ds data setup time 2 s t ah address hold time 0 s t dh data hold time 2 s t dfp oe high to output float delay (2) 0 130 ns t vps v pp setup time 2 s t vcs v cc setup time 2 s t pw ce program pulse width (3) 47.5 52.5 s t oe data valid from oe 150 ns t prt byte /v pp pulse rise time during programming 50 ns codes pins hex data a0 o15 o14 o13 o12 o11 o10 o9 o8 o7 o6 o5 o4 o3 o2 o1 o0 manufacturer 000011110 1e1e device type 111111000 f8f8
AT27BV800 9 rapid programming algorithm a 50 s ce pulse width is used to program. the address is set to the first location. v cc is raised to 6.5v and byte /v pp is raised to 13.0v. each address is first programmed with one 50 s ce pulse without verification. then a verifica- tion/reprogramming loop is executed for each address. in the event a word fails to pass verification, up to 10 succes- sive 50 s pulses are applied with a verification after each pulse. if the word fails to verify after 10 pulses have been applied, the part is considered failed. after the word verifies properly, the next address is selected until all have been checked. v pp is then lowered to 5.0v and v cc to 5.0v. all words are read again and compared with the original data to determine if the device passes or fails.
AT27BV800 10 ordering information t acc (ns) i cc (ma) ordering code package operation range active standby 150 10 0.02 AT27BV800-15jc AT27BV800-15rc AT27BV800-15tc 44j 44r 48t commercial (0 c to 70 c) 10 0.02 AT27BV800-15ji AT27BV800-15ri AT27BV800-15ti 44j 44r 48t industrial (-40 c to 85 c) package type 44j 44-lead, plastic j-leaded chip carrier (plcc) 44r 44-lead, 0.525" wide, plastic gull wing small outline package (soic/sop) 48t 48-lead, plastic thin small outline package (tsop) 12 x 20 mm
AT27BV800 11 packaging information *controlling dimension: millimeters .045(1.14) x 45 pin no. 1 identify .045(1.14) x 30 - 45 .012(.305) .008(.203) .021(.533) .013(.330) .630(16.0) .590(15.0) .043(1.09) .020(.508) .120(3.05) .090(2.29) .180(4.57) .165(4.19) .500(12.7) ref sq .032(.813) .026(.660) .050(1.27) typ .022(.559) x 45 max (3x) .656(16.7) .650(16.5) .695(17.7) .685(17.4) sq sq 44r , 44-lead, 0.525" wide, plastic gull wing small outline package (soic/sop) dimensions in inches and (millimeters) 48t , 48-lead, 12 x 20 mm, plastic thin small outline package (tsop) dimensions in millimeters and (inches)* jedec outline mo-142 bd 44j , 44-lead, plastic j-leaded chip carrier (plcc) dimensions in inches and (millimeters) jedec standard ms-018 ac
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